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ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 5 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
DC
2010
13 years 5 months ago
Rambo: a robust, reconfigurable atomic memory service for dynamic networks
In this paper, we present RAMBO, an algorithm for emulating a read/write distributed shared memory in a dynamic, rapidly changing environment. RAMBO provides a highly reliable, hi...
Seth Gilbert, Nancy A. Lynch, Alexander A. Shvarts...
ICDCSW
2003
IEEE
14 years 2 months ago
Dynamic, Adaptive and Reconfigurable Systems Overview and Prospective Vision
— Systems are more and more expected to work in dynamic environment, to deal with fluctuation of their characteristics and to guaranty functional and nonfunctional requirements. ...
Mehmet Aksit, Zièd Choukair
FPL
2008
Springer
92views Hardware» more  FPL 2008»
13 years 10 months ago
Parallel hardware objects for dynamically partial reconfiguration
Many of today's software-to-hardware compiler projects try to find dataflow parallelism in a sequential program description and use it to generate parallel running hardware c...
Norbert Abel, Frederik Grüll, Nick Meier, And...
LCN
2002
IEEE
14 years 1 months ago
Design and Analysis of a Dynamically Reconfigurable Network Processor
The combination of high-performance processing power and flexibility found in network processors (NPs) has made them a good solution for today’s packet processing needs. Similar...
Ian A. Troxel, Alan D. George, Sarp Oral