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ISCA
1995
IEEE
98views Hardware» more  ISCA 1995»
14 years 1 months ago
Instruction Fetching: Coping with Code Bloat
Previous research has shown that the SPEC benchmarks achieve low miss ratios in relatively small instruction caches. This paper presents evidence that current software-development...
Richard Uhlig, David Nagle, Trevor N. Mudge, Stuar...
WWW
2011
ACM
13 years 5 months ago
Track globally, deliver locally: improving content delivery networks by tracking geographic social cascades
Providers such as YouTube offer easy access to multimedia content to millions, generating high bandwidth and storage demand on the Content Delivery Networks they rely upon. More ...
Salvatore Scellato, Cecilia Mascolo, Mirco Musoles...
RSP
2000
IEEE
111views Control Systems» more  RSP 2000»
14 years 2 months ago
Reconfigurable Instruction Set Processors: A Survey
Reconfigurable instruction set processors have the capability to adapt their instruction sets to the application being executed through a reconfiguration in their hardware. Throug...
Francisco Barat, Rudy Lauwereins
PPOPP
1997
ACM
14 years 1 months ago
Shared Memory Performance Profiling
This paper describes a new approach to finding performance bottlenecks in shared-memory parallel programs and its embodiment in the Paradyn Parallel Performance Tools running with...
Zhichen Xu, James R. Larus, Barton P. Miller
PDPTA
1996
13 years 11 months ago
Evaluation of Dynamic Data Distributions on NUMA Shared Memory Multiprocessors
Dynamic data distributions offer a number of performance benefits, but require more sophisticated compiler support and incur run-time overhead. We investigate attainable benefits ...
Tarek S. Abdelrahman, Kenneth L. Ma