402 search results - page 4 / 81 » Understanding transactional memory performance |
SPAA
2010
ACM
14 years 3 months ago
2010
ACM
Transactional Memory (TM) is a promising technique that simplifies parallel programming for shared-memory applications. To date, most TM systems have been designed to efficientl...
CGO
2009
IEEE
14 years 5 months ago
2009
IEEE
—Most research into high-performance software transactional memory (STM) assumes that transactions will run on a processor with a relatively strict memory model, such as Total St...
PPOPP
2009
ACM
14 years 11 months ago
2009
ACM
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
HIPEAC
2010
Springer
13 years 8 months ago
2010
Springer
We propose a new design for an energy-efficient hardware transactional memory (HTM) system for power-aware embedded devices. Prior hardware transactional memory designs proposed a ...
PPOPP
2006
ACM
14 years 4 months ago
2006
ACM
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...