720 search results - page 78 / 144 » Uniform Memory Hierarchies |
150
Voted
COMPUTER
2000
15 years 4 months ago
2000
Processor and memory technology trends portend a continual increase in the relative cost of accessing main memory. Machine designers have tried to mitigate the effect of this tren...
154
Voted
ISPASS
2008
IEEE
15 years 11 months ago
2008
IEEE
—The potential for improving the performance of data-intensive scientific programs by enhancing data reuse in cache is substantial because CPUs are significantly faster than me...
132
Voted
MICRO
1998
IEEE
15 years 8 months ago
1998
IEEE
This paper provides quantitative measurements of load latency tolerance in a dynamically scheduled processor. To determine the latency tolerance of each memory load operation, our...
184
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SIGMETRICS
1996
ACM
15 years 8 months ago
1996
ACM
This paper describes Embra, a simulator for the processors, caches, and memory systems of uniprocessors and cache-coherent multiprocessors. When running as part of the SimOS simul...
151
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ISCA
1993
IEEE
15 years 8 months ago
1993
IEEE
The distribution of resources among processors, memory and caches is a crucial question faced by designers of large-scale parallel machines. If a machine is to solve problems with...