Sciweavers

720 search results - page 86 / 144
» Uniform Memory Hierarchies
Sort
View
EGH
2011
Springer
14 years 4 months ago
Simpler and Faster HLBVH with Work Queues
A recently developed algorithm called Hierachical Linear Bounding Volume Hierarchies (HLBVH) has demonstrated the feasibility of reconstructing the spatial index needed for ray tr...
Kirill Garanzha, Jacopo Pantaleoni, David K. McAll...
HPCA
2002
IEEE
16 years 4 months ago
Evaluation of a Multithreaded Architecture for Cellular Computing
Cyclops is a new architecture for high performance parallel computers being developed at the IBM T. J. Watson Research Center. The basic cell of this architecture is a single-chip...
Calin Cascaval, José G. Castaños, Lu...
ICS
2000
Tsinghua U.
15 years 8 months ago
Push vs. pull: data movement for linked data structures
As the performance gap between the CPU and main memory continues to grow, techniques to hide memory latency are essential to deliver a high performance computer system. Prefetchin...
Chia-Lin Yang, Alvin R. Lebeck
TC
2008
15 years 4 months ago
The Synonym Lookaside Buffer: A Solution to the Synonym Problem in Virtual Caches
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
Xiaogang Qiu, Michel Dubois
CASES
2010
ACM
15 years 2 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra