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» Unifying Logical and Statistical AI
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ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
14 years 4 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
SP
2010
IEEE
210views Security Privacy» more  SP 2010»
13 years 11 months ago
Reconciling Belief and Vulnerability in Information Flow
Abstract—Belief and vulnerability have been proposed recently to quantify information flow in security systems. Both concepts stand as alternatives to the traditional approaches...
Sardaouna Hamadou, Vladimiro Sassone, Catuscia Pal...