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ASPDAC
2006
ACM
133views Hardware» more  ASPDAC 2006»
14 years 3 months ago
An SPU reference model for simulation, random test generation and verification
– An instruction set level reference model was developed for the development of synergistic processing unit (SPU) , which is one of the key components of the cell processor [1][2...
Yukio Watanabe, Balazs Sallay, Brad W. Michael, Da...
GECCO
2007
Springer
174views Optimization» more  GECCO 2007»
14 years 4 months ago
Investigating data-flow coverage of classes using evolutionary algorithms
It is not unusual for a software development organization to expend 40 percent of total project effort on testing, which can be a very laborious and time-consuming process. Thus, ...
Konstantinos Liaskos, Marc Roper, Murray Wood
FASE
2009
Springer
14 years 4 months ago
HAVE: Detecting Atomicity Violations via Integrated Dynamic and Static Analysis
Abstract. The reality of multi-core hardware has made concurrent programs pervasive. Unfortunately, writing correct concurrent programs is difficult. Atomicity violation, which is ...
Qichang Chen, Liqiang Wang, Zijiang Yang, Scott D....
ICSE
2011
IEEE-ACM
13 years 1 months ago
Pragmatic prioritization of software quality assurance efforts
A plethora of recent work leverages historical data to help practitioners better prioritize their software quality assurance efforts. However, the adoption of this prior work in p...
Emad Shihab
SEFM
2008
IEEE
14 years 4 months ago
Tagging Make Local Testing of Message-Passing Systems Feasible
The only practical way to test distributed messagepassing systems is to use local testing. In this approach, used in formalisms such as concurrent TTCN-3, some components are repl...
Puneet Bhateja, Madhavan Mukund