Sciweavers

4445 search results - page 885 / 889
» Use of statistical timing analysis on real designs
Sort
View
GLOBECOM
2007
IEEE
14 years 1 months ago
Dynamic Multipath Onion Routing in Anonymous Peer-To-Peer Overlay Networks
— Although recent years provided many protocols for anonymous routing in overlay networks, they commonly rely on the same communication paradigm: Onion Routing. In Onion Routing ...
Olaf Landsiedel, Lexi Pimenidis, Klaus Wehrle, Hei...
IEEEPACT
2007
IEEE
14 years 1 months ago
Performance Portable Optimizations for Loops Containing Communication Operations
Effective use of communication networks is critical to the performance and scalability of parallel applications. Partitioned Global Address Space languages like UPC bring the pro...
Costin Iancu, Wei Chen, Katherine A. Yelick
IPCCC
2007
IEEE
14 years 1 months ago
Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study
As Chip Multiprocessor (CMP) has become the mainstream in processor architectures, Intel and AMD have introduced their dual-core processors to the PC market. In this paper, perfor...
Lu Peng, Jih-Kwon Peir, Tribuvan K. Prakash, Yen-K...
CIVR
2007
Springer
119views Image Analysis» more  CIVR 2007»
14 years 1 months ago
An in-memory relevance feedback technique for high-performance image retrieval systems
Content-based image retrieval with relevant feedback has been widely adopted as the query model of choice for improved effectiveness in image retrieval. The effectiveness of thi...
Ning Yu, Khanh Vu, Kien A. Hua
VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
14 years 1 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl