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IISWC
2009
IEEE
14 years 2 months ago
Understanding PARSEC performance on contemporary CMPs
PARSEC is a reference application suite used in industry and academia to assess new Chip Multiprocessor (CMP) designs. No investigation to date has profiled PARSEC on real hardwa...
Major Bhadauria, Vincent M. Weaver, Sally A. McKee
CRV
2008
IEEE
165views Robotics» more  CRV 2008»
14 years 2 months ago
Hierarchical Stereo with Thin Structures and Transparency
Dense stereo algorithms rely on matching over a range of disparities. To speed up the search and reduce match ambiguity, processing can be embedded in the hierarchical, or coarse-...
Mikhail Sizintsev
ISVLSI
2006
IEEE
115views VLSI» more  ISVLSI 2006»
14 years 1 months ago
Performance and Power Analysis of Globally Asynchronous Locally Synchronous Multi-Processor Systems
This paper investigates the performance and power dissipation of Globally Asynchronous Locally Synchronous (GALS) multi-processor systems. We show that communication loops are a s...
Zhiyi Yu, Bevan M. Baas
IPPS
2005
IEEE
14 years 1 months ago
Exploring the Energy-Time Tradeoff in MPI Programs on a Power-Scalable Cluster
Recently, energy has become an important issue in highperformance computing. For example, supercomputers that have energy in mind, such as BlueGene/L, have been built; the idea is...
Vincent W. Freeh, Feng Pan, Nandini Kappiah, David...
ISCAS
2005
IEEE
103views Hardware» more  ISCAS 2005»
14 years 1 months ago
Why area might reduce power in nanoscale CMOS
— In this paper we explore the relationship between power and area. By exploiting parallelism (and thus using more area) one can reduce the switching frequency allowing a reducti...
Paul Beckett, S. C. Goldstein