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CONCURRENCY
2010
130views more  CONCURRENCY 2010»
13 years 9 months ago
Enabling high-speed asynchronous data extraction and transfer using DART
As the complexity and scale of current scientific and engineering applications grow, managing and transporting the large amounts of data they generate is quickly becoming a signif...
Ciprian Docan, Manish Parashar, Scott Klasky
EMSOFT
2006
Springer
14 years 14 days ago
Modeling a system controller for timing analysis
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
Stephan Thesing
ISMVL
2010
IEEE
209views Hardware» more  ISMVL 2010»
14 years 1 months ago
Secure Design Flow for Asynchronous Multi-valued Logic Circuits
—The purpose of secure devices such as smartcards is to protect secret information against software and hardware attacks. Implementation of the appropriate protection techniques ...
Ashur Rafiev, Julian P. Murphy, Alexandre Yakovlev
FCCM
2000
IEEE
122views VLSI» more  FCCM 2000»
14 years 1 months ago
Evaluating Hardware Compilation Techniques
Hardware compilation techniques which use highlevel programming languages to describe and synthesize hardware are gaining popularity. They are especially useful for reconfigurable...
Markus Weinhardt, Wayne Luk
CHARME
2001
Springer
133views Hardware» more  CHARME 2001»
14 years 1 months ago
View from the Fringe of the Fringe
Formal analysis remains outside the mainstream of system design practice. Interactive methods and tools are regarded by some to be on the margin of useful research in this area. Al...
Steven D. Johnson