Sciweavers

14 search results - page 1 / 3
» Using EventB to Create a Virtual Machine Instruction Set Arc...
Sort
View
ASM
2008
ASM
14 years 26 days ago
Using EventB to Create a Virtual Machine Instruction Set Architecture
A Virtual Machine (VM) is a program running on a conventional microprocessor that emulates the binary instruction set, registers, and memory space of an idealized computing machine...
Stephen Wright
HIPEAC
2010
Springer
14 years 24 days ago
Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Automatic Instruction Set Extensions
Abstract. Customizable processors augmented with application-specific Instruction Set Extensions (ISEs) have begun to gain traction in recent years. The most effective ISEs include...
Theo Kluter, Samuel Burri, Philip Brisk, Edoardo C...
CASES
2007
ACM
14 years 2 months ago
A fast and generic hybrid simulation approach using C virtual machine
Instruction Set Simulators (ISSes) are important tools for cross-platform software development. The simulation speed is a major concern and many approaches have been proposed to i...
Lei Gao, Stefan Kraemer, Rainer Leupers, Gerd Asch...
VEE
2012
ACM
232views Virtualization» more  VEE 2012»
12 years 6 months ago
DVM: towards a datacenter-scale virtual machine
As cloud-based computation becomes increasingly important, providing a general computational interface to support datacenterscale programming has become an imperative research age...
Zhiqiang Ma, Zhonghua Sheng, Lin Gu, Liufei Wen, G...
CGO
2006
IEEE
14 years 4 months ago
Constructing Virtual Architectures on a Tiled Processor
As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these ...
David Wentzlaff, Anant Agarwal