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CF
2007
ACM
13 years 11 months ago
Accelerating memory decryption and authentication with frequent value prediction
This paper presents a novel architectural technique to hide fetch latency overhead of hardware encrypted and authenticated memory. A number of recent secure processor designs have...
Weidong Shi, Hsien-Hsin S. Lee
INFOCOM
2002
IEEE
14 years 21 days ago
Clock Synchronization Algorithms for Network Measurements
Abstract—Packet delay traces are important measurements for analyzing end-to-end performance and for designing traffic control algorithms in computer networks. Due to the fact t...
Li Zhang, Zhen Liu, Cathy H. Xia
GPCE
2008
Springer
13 years 8 months ago
Property models: from incidental algorithms to reusable components
A user interface, such as a dialog, assists a user in synthesising a set of values, typically parameters for a command object. Code for “command parameter synthesis” is usuall...
Jaakko Järvi, Mat Marcus, Sean Parent, John F...
CODES
2008
IEEE
13 years 9 months ago
Performance debugging of Esterel specifications
Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based...
Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury, Samar...
WCRE
2010
IEEE
13 years 6 months ago
Mining Source Code for Structural Regularities
Abstract—During software development, design rules and contracts in the source code are often encoded through regularities, such as API usage protocols, coding idioms and naming ...
Angela Lozano, Andy Kellens, Kim Mens, Gabriela Ar...