Sciweavers

643 search results - page 16 / 129
» Using Hardware Counters to Automatically Improve Memory Perf...
Sort
View
MICRO
2010
IEEE
189views Hardware» more  MICRO 2010»
13 years 6 months ago
A Dynamically Adaptable Hardware Transactional Memory
Most Hardware Transactional Memory (HTM) implementations choose fixed version and conflict management policies at design time. While eager HTM systems store transactional state in-...
Marc Lupon, Grigorios Magklis, Antonio Gonzá...
INFOCOM
2012
IEEE
11 years 11 months ago
The Variable-Increment Counting Bloom Filter
—Counting Bloom Filters (CBFs) are widely used in networking device algorithms. They implement fast set representations to support membership queries with limited error, and supp...
Ori Rottenstreich, Yossi Kanizo, Isaac Keslassy
PARA
2004
Springer
14 years 1 months ago
Cache Optimizations for Iterative Numerical Codes Aware of Hardware Prefetching
Cache optimizations typically include code transformations to increase the locality of memory accesses. An orthogonal approach is to enable for latency hiding by introducing prefet...
Josef Weidendorfer, Carsten Trinitis
QEST
2010
IEEE
13 years 6 months ago
Automatic Compositional Reasoning for Probabilistic Model Checking of Hardware Designs
Adaptive techniques like voltage and frequency scaling, process variations and the randomness of input data contribute signi cantly to the statistical aspect of contemporary hardwa...
Jayanand Asok Kumar, Shobha Vasudevan
PDP
2005
IEEE
14 years 2 months ago
A Comparison Study of the HLRC-DU Protocol versus a HLRC Hardware Assisted Protocol
SVM systems are a cheaper and flexible way to implement the shared memory programming paradigm. Their huge flexibility is due to their software implementation; however, this is al...
Salvador Petit, Julio Sahuquillo, Ana Pont