162 search results - page 11 / 33 » Using Hardware Performance Monitors to Isolate Memory Bottle... |
SC
2004
ACM
14 years 1 months ago
2004
ACM
The Merrimac supercomputer uses stream processors and a highradix network to achieve high performance at low cost and low power. The stream architecture matches the capabilities o...
IISWC
2009
IEEE
14 years 3 months ago
2009
IEEE
PARSEC is a reference application suite used in industry and academia to assess new Chip Multiprocessor (CMP) designs. No investigation to date has profiled PARSEC on real hardwa...
ISCA
2009
IEEE
14 years 3 months ago
2009
IEEE
The advent of multicores has introduced new challenges for programmers to provide increased performance and software reliability. There has been significant interest in technique...
HPCA
2000
IEEE
14 years 26 days ago
2000
IEEE
Memorylatency isbecominganincreasingly importantperformance bottleneck, especially in multiprocessors. One technique for tolerating memory latency is multithreading, whereby we sw...
IPPS
2003
IEEE
14 years 1 months ago
2003
IEEE
SBT is portable library and tool for on-line debugging and performance monitoring of shared-memory parallel programs using the single-program-multiple-data (SPMD) model of paralle...