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ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
14 years 4 months ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...
ANOR
2008
69views more  ANOR 2008»
13 years 11 months ago
Scheduling vessels and container-yard operations with conflicting objectives
Abstract We consider the problem of coordinating the operations of two supply chain partners: a foreign shipping company and a domestic port. The two partners have conflicting busi...
Endre Boros, Lei Lei, Yao Zhao, Hua Zhong
SODA
2010
ACM
209views Algorithms» more  SODA 2010»
14 years 8 months ago
Counting Stars and Other Small Subgraphs in Sublinear Time
Detecting and counting the number of copies of certain subgraphs (also known as network motifs or graphlets), is motivated by applications in a variety of areas ranging from Biolo...
Mira Gonen, Dana Ron, Yuval Shavitt
JCP
2008
162views more  JCP 2008»
13 years 10 months ago
A Hypercube-based Scalable Interconnection Network for Massively Parallel Computing
An important issues in the design of interconnection networks for massively parallel computers is scalability. A new scalable interconnection network topology, called Double-Loop H...
Youyao Liu, Jungang Han, Huimin Du
DAC
2003
ACM
14 years 4 months ago
Improved indexing for cache miss reduction in embedded systems
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
Tony Givargis