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» Using Queue Time Predictions for Processor Allocation
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IPPS
2007
IEEE
14 years 2 months ago
Microarchitectural Support for Speculative Register Renaming
This paper proposes and evaluates a new microarchitecture for out-of-order processors that supports speculative renaming. We call speculative renaming to the speculative omission ...
Jesús Alastruey, Teresa Monreal, Víc...
ICS
1995
Tsinghua U.
13 years 11 months ago
A Data Cache with Multiple Caching Strategies Tuned to Different Types of Locality
Current data cache organizations fail to deliver high performance in scalar processors for many vector applications. There are two main reasons for this loss of performance: the u...
Antonio González, Carlos Aliagas, Mateo Val...
ECRTS
2007
IEEE
14 years 2 months ago
On Controllability and Feasibility of Utilization Control in Distributed Real-Time Systems
Feedback control techniques have recently been applied to a variety of real-time systems. However, a fundamental issue that was left out is guaranteeing system controllability and...
Xiaorui Wang, Yingming Chen, Chenyang Lu, Xenofon ...
HPDC
2006
IEEE
14 years 1 months ago
On the Harmfulness of Redundant Batch Requests
Most parallel computing resources are controlled by batch schedulers that place requests for computation in a queue until access to compute nodes is granted. Queue waiting times a...
Henri Casanova
CASES
2009
ACM
14 years 2 months ago
CheckerCore: enhancing an FPGA soft core to capture worst-case execution times
Embedded processors have become increasingly complex, resulting in variable execution behavior and reduced timing predictability. On such processors, safe timing specifications e...
Jin Ouyang, Raghuveer Raghavendra, Sibin Mohan, Ta...