610 search results - page 70 / 122 » Using SAT in QBF |
TCAD
2010
13 years 3 months ago
2010
As contemporary VLSI designs grow in complexity, design debugging has rapidly established itself as one of the largest bottlenecks in the design cycle today. Automated debug soluti...
FPGA
2007
ACM
14 years 3 months ago
2007
ACM
Boolean matching (BM) is a widely used technique in FPGA resynthesis and architecture evaluation. In this paper we present several improvements to the recently proposed SAT-based ...
CP
2009
Springer
14 years 9 months ago
2009
Springer
A problem that is inherent to the development and efficient use of solvers is that of tuning parameters. The CP community has a long history of addressing this task automatically. ...
ICTAI
2009
IEEE
14 years 3 months ago
2009
IEEE
In this paper a new learning scheme for SAT is proposed. The originality of our approach arises from its ability to achieve clause learning even if no conflict occurs. This clear...
ICTAI
2009
IEEE
14 years 3 months ago
2009
IEEE
In this paper a learning based local search approach for propositional satisfiability is presented. It is based on an original adaptation of the conflict driven clause learning ...