453 search results - page 16 / 91 » Using Symbolic Simulation for Bounded Property Checking |
FM
2009
Springer
14 years 2 months ago
2009
Springer
In Bounded Model Checking both the system model and the checked property are translated into a Boolean formula to be analyzed by a SAT-solver. We introduce a new encoding technique...
ASE
2005
13 years 7 months ago
2005
Inaccuracies, or deviations, in the measurements of monitored variables in a control system are facts of life that control software must accommodate. Deviation analysis can be used...
ESOP
2003
Springer
14 years 21 days ago
2003
Springer
This paper proposes the use of constraint logic programming (CLP) to perform model checking of traditional, imperative programs. We present a semantics-preserving translation from ...
ISVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
Formal verification has become an important step in circuit and system design. A prominent technique is Bounded Model Checking (BMC) which is widely used in industry. In BMC it i...
UML
2004
Springer
14 years 25 days ago
2004
Springer
This paper discusses a model-based design flow for requirements in distributed embedded software development. Such requirements are specified using a language similar to Linear T...