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» Using Symbolic Simulation for Bounded Property Checking
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CAV
2004
Springer
123views Hardware» more  CAV 2004»
14 years 2 months ago
SAL 2
SAL 2 augments the specification language and explicit-state model checker of SAL 1 with high-performance symbolic and bounded model checkers, and with novel infinite bounded and...
Leonardo Mendonça de Moura, Sam Owre, Haral...
CAV
2004
Springer
202views Hardware» more  CAV 2004»
14 years 2 months ago
Statistical Model Checking of Black-Box Probabilistic Systems
Abstract. We propose a new statistical approach to analyzing stochastic systems against specifications given in a sublogic of continuous stochastic logic (CSL). Unlike past numeri...
Koushik Sen, Mahesh Viswanathan, Gul Agha
ASYNC
2005
IEEE
118views Hardware» more  ASYNC 2005»
14 years 2 months ago
Modeling and Verifying Circuits Using Generalized Relative Timing
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...
Sanjit A. Seshia, Randal E. Bryant, Kenneth S. Ste...
GLOBECOM
2009
IEEE
14 years 3 months ago
Sparse Decoding of Low Density Parity Check Codes Using Margin Propagation
—One of the key factors underlying the popularity of Low-density parity-check (LDPC) code is its iterative decoding algorithm that is amenable to efficient hardware implementati...
Ming Gu, Kiran Misra, Hayder Radha, Shantanu Chakr...
ATVA
2005
Springer
131views Hardware» more  ATVA 2005»
14 years 2 months ago
An MTBDD-Based Implementation of Forward Reachability for Probabilistic Timed Automata
Multi-Terminal Binary Decision Diagrams (MTBDDs) have been successfully applied in symbolic model checking of probabilistic systems. In this paper we propose an encoding method for...
Fuzhi Wang, Marta Z. Kwiatkowska