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» Using a SAT solver to generate checking sequences
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GLVLSI
2005
IEEE
85views VLSI» more  GLVLSI 2005»
14 years 1 months ago
Utilizing don't care states in SAT-based bounded sequential problems
Boolean Satisfiability (SAT) solvers are popular engines used throughout the verification world. Bounded sequential problems such as bounded model checking and bounded sequentia...
Sean Safarpour, Görschwin Fey, Andreas G. Ven...
CSCLP
2008
Springer
13 years 9 months ago
Challenges in Constraint-Based Analysis of Hybrid Systems
In the analysis of hybrid discrete-continuous systems, rich arithmetic constraint formulae with complex Boolean structure arise naturally. The iSAT algorithm, a solver for such for...
Andreas Eggers, Natalia Kalinnik, Stefan Kupfersch...
DAC
2007
ACM
14 years 8 months ago
On Resolution Proofs for Combinational Equivalence
Modern combinational equivalence checking (CEC) engines are complicated programs which are difficult to verify. In this paper we show how a modern CEC engine can be modified to pr...
Satrajit Chatterjee, Alan Mishchenko, Robert K. Br...
KBSE
2007
IEEE
14 years 1 months ago
Sequential circuits for program analysis
A number of researchers have proposed the use of Boolean satisfiability solvers for verifying C programs. They encode correctness checks as Boolean formulas using finitization: ...
Fadi A. Zaraket, Adnan Aziz, Sarfraz Khurshid
BIRTHDAY
2009
Springer
14 years 2 months ago
Hybrid BDD and All-SAT Method for Model Checking
We present a new hybrid BDD and SAT-based algorithm for model checking. Our algorithm is based on backward search, where each pre-image computation consists of an efficient All-SA...
Avi Yadgar, Orna Grumberg, Assaf Schuster