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ASAP
2008
IEEE
161views Hardware» more  ASAP 2008»
13 years 9 months ago
Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards
In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posterio...
Yang Sun, Yuming Zhu, Manish Goel, Joseph R. Caval...
WSC
2004
13 years 9 months ago
An Automatic Distributed Simulation Environment
Developing a sequential simulation program is not an easy task. Developing a distributed simulation program is harder than a sequential one because it is necessary to deal with ma...
Sarita Mazzini Bruschi, Regina Helena Carlucci San...
LCPC
2007
Springer
14 years 1 months ago
Pillar: A Parallel Implementation Language
Abstract. As parallelism in microprocessors becomes mainstream, new programming languages and environments are emerging to meet the challenges of parallel programming. To support r...
Todd Anderson, Neal Glew, Peng Guo, Brian T. Lewis...
ISCA
1996
IEEE
103views Hardware» more  ISCA 1996»
13 years 12 months ago
Evaluation of Design Alternatives for a Multiprocessor Microprocessor
In the future, advanced integrated circuit processing and packaging technology will allow for several design options for multiprocessor microprocessors. In this paper we consider ...
Basem A. Nayfeh, Lance Hammond, Kunle Olukotun
HPDC
2007
IEEE
14 years 2 months ago
Feedback-directed thread scheduling with memory considerations
This paper describes a novel approach to generate an optimized schedule to run threads on distributed shared memory (DSM) systems. The approach relies upon a binary instrumentatio...
Fengguang Song, Shirley Moore, Jack Dongarra