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» Using the Temporal Logic RDL for Design Specifications
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135
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IICAI
2007
15 years 5 months ago
Automated Test Generation from Models Based on Functional Software Specifications
The paper presents first results of a project that aims at building a model-based tool for functional testing of control software for passenger vehicles. The objective is that this...
Michael Esser, Peter Struss
150
Voted
SPIN
2000
Springer
15 years 7 months ago
The Temporal Rover and the ATG Rover
The Temporal Rover is a specification based verification tool for applications written in C, C++, Java, Verilog and VHDL. The tool combines formal specification, using Linear-Time ...
Doron Drusinsky
174
Voted
RV
2010
Springer
220views Hardware» more  RV 2010»
15 years 1 months ago
Runtime Verification with the RV System
The RV system is the first system to merge the benefits of Runtime Monitoring with Predictive Analysis. The Runtime Monitoring portion of RV is based on the successful Monitoring O...
Patrick O'Neil Meredith, Grigore Rosu
143
Voted
ECOOP
1995
Springer
15 years 7 months ago
Interface-Based Protocol Specification of Open Systems using PSL
PSL is a framework for describing dynamic and architectural properties of open systems. PSL extends established interface-based tactics for describing the functional properties of...
Doug Lea, Jos Marlowe
133
Voted
ICSE
2008
IEEE-ACM
16 years 4 months ago
Symbolic mining of temporal specifications
Program specifications are important in many phases of the software development process, but they are often omitted or incomplete. An important class of specifications takes the f...
Mark Gabel, Zhendong Su