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» VERA: an extensible router architecture
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ICCD
2004
IEEE
122views Hardware» more  ICCD 2004»
14 years 4 months ago
Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures
Network-on-chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity fo...
Krishnan Srinivasan, Karam S. Chatha, Goran Konjev...
ICW
2005
IEEE
178views Communications» more  ICW 2005»
14 years 1 months ago
Adding Multi-Class Routing into the DiffServ Architecture
- To alleviate the problem of high priority traffic hogging of all the available network capacity and to optimize the network traffic in the DiffServ network, we introduce the mult...
Yin Wang, Raimo Kantola, Shuping Liu
ICNP
2000
IEEE
13 years 11 months ago
Differentiated Predictive Fair Service for TCP Flows
The majority of the traffic (bytes) flowing over the Internet today have been attributed to the Transmission Control Protocol (TCP). This strong presence of TCP has recently spu...
Ibrahim Matta, Liang Guo
NETWORKING
2010
13 years 8 months ago
Stateless RD Network Services
Rate-Delay (RD) Network Services constitute a promising differentiated-services architecture for multi-provider networks, by offering users a choice between high throughput or low ...
Maxim Podlesny, Sergey Gorinsky
ANCS
2009
ACM
13 years 5 months ago
Progressive hashing for packet processing using set associative memory
As the Internet grows, both the number of rules in packet filtering databases and the number of prefixes in IP lookup tables inside the router are growing. The packet processing e...
Michel Hanna, Socrates Demetriades, Sangyeun Cho, ...