598 search results - page 59 / 120 » VLSI Implementation of Neural Networks |
SBRN
1998
IEEE
14 years 13 hour ago
1998
IEEE
This paper describes an architecture based on spatiotemporal networks that identifies sequences of numbers. This architecture incorporates an input layer that transforms (by means...
AIIA
2003
Springer
13 years 11 months ago
2003
Springer
A novel, two stage, neural architecture for the segmentation of range data and their modeling with undeformed superquadrics is presented. The system is composed by two distinct neu...
ECCC
2000
13 years 7 months ago
2000
This article initiates a rigorous theoretical analysis of the computational power of circuits that employ modules for computing winner-take-all. Computational models that involve ...
DCC
2010
IEEE
13 years 6 months ago
2010
IEEE
This work proposes a novel practical and general-purpose lossless compression algorithm named Neural Markovian Predictive Compression (NMPC), based on a novel combination of Bayesi...
GECCO
2003
Springer
14 years 29 days ago
2003
Springer
Continuous Time Recurrent Neural Networks (CTRNNs) have previously been proposed as an enabling paradigm for evolving analog electrical circuits to serve as controllers for physica...