70 search results - page 6 / 14 » VLSI Implementation of a Fault-Tolerant Distributed Clock Ge... |
RTAS
1999
IEEE
14 years 2 months ago
1999
IEEE
In this paper we propose a dynamic constraint transformation technique for ensuring timing requirements in a distributed real-time system possessing periodically synchronized dist...
PDP
1997
IEEE
14 years 2 months ago
1997
IEEE
Event tracing and monitoring of parallel applications are difficult if each processor has its own unsynchronized clock. A survey is given on several strategies to generate a glob...
JCP
2008
13 years 9 months ago
2008
In this paper, a technique to generate expander graphs using Cellular Automata (CA) has been presented. The special class of CA, known as the Two Predecessor Single Attractor Cellu...
EMSOFT
2009
Springer
14 years 4 months ago
2009
Springer
An important step in model-based embedded system design consists in mapping functional specifications and their tasks/operations onto execution architectures and their ressources...
VLSID
2005
IEEE
14 years 10 months ago
2005
IEEE
Synchronous design methods have intrinsic performance overheads due to their use of the global clock and timing assumptions. In future manufacturing processes not only may it beco...