31 search results - page 3 / 7 » Value Prediction for Speculative Multithreaded Architectures |
IWMM
2010
Springer
14 years 6 days ago
2010
Springer
With the availability of chip multiprocessor (CMP) and simultaneous multithreading (SMT) machines, extracting thread level parallelism from a sequential program has become crucial...
ICS
1999
Tsinghua U.
13 years 11 months ago
1999
Tsinghua U.
In this paper we present a processor microarchitecture that can simultaneously execute multiple threads and has a clustered design for scalability purposes. A main feature of the ...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Multi-core processors, with low communication costs and high availability of execution cores, will increase the use of execution and compilation models that use short threads to e...
JILP
2000
13 years 7 months ago
2000
Load latency remains a signi cant bottleneck in dynamically scheduled pipelined processors. Load speculation techniques have been proposed to reduce this latency. Dependence Predi...
MICRO
1998
IEEE
13 years 11 months ago
1998
IEEE
Load latency remains a significant bottleneck in dynamically scheduled pipelined processors. Load speculation techniques have been proposed to reduce this latency. Dependence Pred...