47 search results - page 3 / 10 » Vector Lane Threading |
ISCA
1992
IEEE
14 years 1 months ago
1992
IEEE
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
ADBIS
2009
Springer
14 years 4 months ago
2009
Springer
The inefficiency of integration processes—as an abstraction of workflow-based integration tasks—is often reasoned by low resource utilization and significant waiting times f...
EMNLP
2009
13 years 7 months ago
2009
This paper addresses the issue of extracting contexts and answers of questions from post discussion of online forums. We propose a novel and unified model by customizing the struc...
TACAS
2010
Springer
14 years 4 months ago
2010
Springer
Abstract. We present Boom, a comprehensive analysis tool for Boolean programs. We focus in this paper on model-checking non-recursive concurrent programs. Boom implements a recent ...
JUCS
2000
13 years 9 months ago
2000
: Since the era of vector and pipelined computing, the computational speed is limited by the memory access time. Faster caches and more cache levels are used to bridge the growing ...