61 search results - page 3 / 13 » Verification Environment for a SCMP Architecture |
PAMI
2007
13 years 6 months ago
2007
—Conventional verification systems, such as those controlling access to a secure room, do not usually require the user to reauthenticate himself for continued access to the prote...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
In this paper we discuss an efficient design flow from Matlab® to FPGA. Employing Matlab for algorithm research and as system level language allows efficient transition from algo...
WSC
2008
13 years 9 months ago
2008
Proposed in this paper is the architecture of a PLC programming environment that enables a visual verification of PLC programs. The proposed architecture integrates a PLC program ...
STTT
2010
13 years 5 months ago
2010
Tool support for the Java Modeling Language (JML) is a very pressing problem. A main issue with current tools is their architecture: the cost of keeping up with the evolution of Ja...
EUROMICRO
2007
IEEE
13 years 11 months ago
2007
IEEE
In component-based hardware/software co-verification, properties of an embedded system are established from properties of its hardware and software components. A major challenge i...