Sciweavers

714 search results - page 125 / 143
» Verification and Compliance Testing
Sort
View
ISQED
2003
IEEE
233views Hardware» more  ISQED 2003»
14 years 1 months ago
Active Device under Bond Pad to Save I/O Layout for High-pin-count SOC
To save layout area for electrostatic discharge (ESD) protection design in the SOC era, test chip with large size NMOS devices placed under bond pads has been fabricated in 0.35-Â...
Ming-Dou Ker, Jeng-Jie Peng, Hsin-Chin Jiang
ASIAMS
2009
IEEE
14 years 1 months ago
Evolutionary-Reduced Ordered Binary Decision Diagram
—Reduced ordered binary decision diagram (ROBDD) is a memory-efficient data structure which is used in many applications such as synthesis, digital system, verification, testing ...
Hossein Moeinzadeh, Mehdi Mohammadi, Hossein Pazho...
UML
2001
Springer
14 years 1 months ago
Formalization of UML-Statecharts
The work presented here is part of a project that aims at the definition of a methodology for developing realtime software systems based on UML. In fact, being relatively easy to ...
Michael von der Beeck
AGP
1999
IEEE
14 years 28 days ago
ACI1 constraints
Disunification is the problem of deciding satisfiability of a system of equations and disequations with respect to a given equational theory. In this paper we study the disunifica...
Agostino Dovier, Carla Piazza, Enrico Pontelli, Gi...
ACMACE
2007
ACM
14 years 19 days ago
Serious video game effectiveness
Given the interactive media characteristics and intrinsically motivating appeal, computer games are often praised for their potential and value in education. However, comprehensiv...
Wee Ling Wong, Cuihua Shen, Luciano Nocera, Eduard...