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EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
14 years 1 months ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko
ACMICEC
2007
ACM
154views ECommerce» more  ACMICEC 2007»
14 years 1 months ago
Learning and adaptivity in interactive recommender systems
Recommender systems are intelligent E-commerce applications that assist users in a decision-making process by offering personalized product recommendations during an interaction s...
Tariq Mahmood, Francesco Ricci
AOSD
2009
ACM
14 years 1 months ago
The dataflow pointcut: a formal and practical framework
Some security concerns are sensitive to flow of information in a program execution. The dataflow pointcut has been proposed by Masuhara and Kawauchi in order to easily implement s...
Dima Alhadidi, Amine Boukhtouta, Nadia Belblidia, ...
AMOST
2007
ACM
14 years 1 months ago
Using LTL rewriting to improve the performance of model-checker based test-case generation
Model-checkers have recently been suggested for automated software test-case generation. Several works have presented methods that create efficient test-suites using model-checker...
Gordon Fraser, Franz Wotawa
CF
2007
ACM
14 years 1 months ago
Accelerating memory decryption and authentication with frequent value prediction
This paper presents a novel architectural technique to hide fetch latency overhead of hardware encrypted and authenticated memory. A number of recent secure processor designs have...
Weidong Shi, Hsien-Hsin S. Lee