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» Verification of Equivalent-Results Methods
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ATVA
2006
Springer
131views Hardware» more  ATVA 2006»
14 years 1 months ago
Timed Unfoldings for Networks of Timed Automata
Whereas partial order methods have proved their efficiency for the analysis of discrete-event systems, their application to timed systems remains a challenging research topic. Here...
Patricia Bouyer, Serge Haddad, Pierre-Alain Reynie...
FMCAD
2006
Springer
14 years 1 months ago
Ario: A Linear Integer Arithmetic Logic Solver
Ario is a solver for systems of linear integer arithmetic logic. Such systems are commonly used in design verification applications and are classified under Satisfiability Modulo T...
Hossein M. Sheini, Karem A. Sakallah
FMICS
2006
Springer
14 years 1 months ago
Can Saturation Be Parallelised?
Abstract. Symbolic state-space generators are notoriously hard to parallelise. However, the Saturation algorithm implemented in the SMART verification tool differs from other seque...
Jonathan Ezekiel, Gerald Lüttgen, Radu Simini...
FORMATS
2006
Springer
14 years 1 months ago
Integrating Discrete- and Continuous-Time Metric Temporal Logics Through Sampling
Abstract. Real-time systems usually encompass parts that are best described by a continuous-time model, such as physical processes under control, together with other components tha...
Carlo A. Furia, Matteo Rossi
GECCO
2006
Springer
148views Optimization» more  GECCO 2006»
14 years 1 months ago
A specification-based fitness function for evolutionary testing of object-oriented programs
Encapsulation of states in object-oriented programs hinders the search for test data using evolutionary testing. As client code is oblivious to the internal state of a server obje...
Yoonsik Cheon, Myoung Kim