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» Verification of Timed Systems Using POSETs
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EUROMICRO
2000
IEEE
13 years 11 months ago
Formal Coverification of Embedded Systems Using Model Checking
The complexity of embedded systems is increasing rapidly. In consequence, new verification techniques that overcome the limitations of traditional methods and are suitable for har...
Luis Alejandro Cortés, Petru Eles, Zebo Pen...
TSE
2008
97views more  TSE 2008»
13 years 7 months ago
Timed Automata Patterns
Timed Automata have proven to be useful for specification and verification of real-time systems. System design using Timed Automata relies on explicit manipulation of clock variabl...
Jin Song Dong, Ping Hao, Shengchao Qin, Jun Sun 00...
MCS
2007
Springer
14 years 1 months ago
Serial Fusion of Fingerprint and Face Matchers
The serial fusion of multiple biometric traits for personal identity verification has been poorly investigated so far. However, this approach exhibits some potential advantages, fo...
Gian Luca Marcialis, Fabio Roli
FMCO
2008
Springer
167views Formal Methods» more  FMCO 2008»
13 years 9 months ago
Formal Behavioral Modeling and Compliance Analysis for Service-Oriented Systems
In this paper, we present a framework for formal modeling and verification of service-based business processes with focus on their compliance to external regulations such as Segreg...
Natallia Kokash, Farhad Arbab
FDL
2004
IEEE
13 years 11 months ago
A Formal Verification Approach for IP-based Designs
This paper proposes a formal verification methodology which is smoothly integrated with component-based system-level design, using a divide and conquer approach. The methodology a...
Daniel Karlsson, Petru Eles, Zebo Peng