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HYBRID
1998
Springer
14 years 6 days ago
Formal Verification of Safety-Critical Hybrid Systems
This paper investigates how formal techniques can be used for the analysis and verification of hybrid systems [1,5,7,16] -- systems involving both discrete and continuous behavior....
Carolos Livadas, Nancy A. Lynch
CSL
2004
Springer
13 years 11 months ago
A Functional Scenario for Bytecode Verification of Resource Bounds
We consider a scenario where (functional) programs in pre-compiled form are exchanged among untrusted parties. Our contribution is a system of annotations for the code that can be ...
Roberto M. Amadio, Solange Coupet-Grimal, Silvano ...
FORMATS
2007
Springer
13 years 12 months ago
Combining Formal Verification with Observed System Execution Behavior to Tune System Parameters
Resource limited DRE (Distributed Real-time Embedded) systems can benefit greatly from dynamic adaptation of system parameters. We propose a novel approach that employs iterative t...
Minyoung Kim, Mark-Oliver Stehr, Carolyn L. Talcot...
CODES
2008
IEEE
13 years 9 months ago
Model checking SystemC designs using timed automata
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
Paula Herber, Joachim Fellmuth, Sabine Glesner
ISARCS
2010
156views Hardware» more  ISARCS 2010»
13 years 10 months ago
A Road to a Formally Verified General-Purpose Operating System
Methods of formal description and verification represent a viable way for achieving fundamentally bug-free software. However, in reality only a small subset of the existing operati...
Martin Decký