196 search results - page 11 / 40 » Verification of timing Properties of VHDL |
TCAD
2010
13 years 2 months ago
2010
Abstract--Functional verification is one of the major bottlenecks in system-on-chip design due to the combined effects of increasing complexity and lack of automated techniques for...
FMICS
2008
Springer
13 years 9 months ago
2008
Springer
There has been relatively little work on the implementability of timing requirements. We have previously provided definitions of fundamental timing operators that explicitly consid...
RTS
2008
13 years 7 months ago
2008
The aim of this paper is to show, how a multitasking application running under a real-time operating system compliant with an OSEK/VDX standard can be modeled by timed automata. Th...
CADE
2008
Springer
14 years 8 months ago
2008
Springer
Many safety- and security-critical systems are real-time systems and, as a result, tools and techniques for verifying real-time systems are extremely important. Simulation and test...
CSL
2004
Springer
13 years 11 months ago
2004
Springer
We consider a scenario where (functional) programs in pre-compiled form are exchanged among untrusted parties. Our contribution is a system of annotations for the code that can be ...