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» Verifying Correctness of Transactional Memories
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DAGSTUHL
2007
13 years 8 months ago
A Case for Deconstructing Hardware Transactional Memory Systems
Major hardware and software vendors are curious about transactional memory (TM), but are understandably cautious about committing to hardware changes. Our thesis is that deconstru...
Mark D. Hill, Derek Hower, Kevin E. Moore, Michael...
SPAA
2009
ACM
14 years 7 months ago
On avoiding spare aborts in transactional memory
This paper takes a step toward developing a theory for understanding aborts in transactional memory systems (TMs). Existing TMs may abort many transactions that could, in fact, co...
Idit Keidar, Dmitri Perelman
ASPLOS
2004
ACM
14 years 4 days ago
Programming with transactional coherence and consistency (TCC)
Transactional Coherence and Consistency (TCC) offers a way to simplify parallel programming by executing all code within transactions. In TCC systems, transactions serve as the fu...
Lance Hammond, Brian D. Carlstrom, Vicky Wong, Ben...
ACMMSP
2006
ACM
257views Hardware» more  ACMMSP 2006»
14 years 21 days ago
Memory models for open-nested transactions
Open nesting provides a loophole in the strict model of atomic transactions. Moss and Hosking suggested adapting open nesting for transactional memory, and Moss and a group at Sta...
Kunal Agrawal, Charles E. Leiserson, Jim Sukha
IPPS
2008
IEEE
14 years 1 months ago
Intermediate checkpointing with conflicting access prediction in transactional memory systems
Transactional memory systems promise to reduce the burden of exposing thread-level parallelism in programs by relieving programmers from analyzing complex inter-thread dependences...
M. M. Waliullah, Per Stenström