108 search results - page 13 / 22 » Verifying Design with Proof Scores |
TPHOL
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper concerns the formal semantics of programming languages, and the specification and verification of software. We are interested in the verification of real programs, wr...
ADAEUROPE
2005
Springer
14 years 2 months ago
2005
Springer
Abstract. The Ravenscar Profile is a restricted subset of the Ada tasking model, designed to meet the requirements of producing analysable and deterministic code. A central featur...
PADL
2009
Springer
14 years 9 months ago
2009
Springer
Abstract. In this paper, we present our initial design and implementation of a declarative network verifier (DNV). DNV utilizes theorem proving, a well established verification tec...
ESOP
2010
Springer
14 years 6 months ago
2010
Springer
Transient faults are single-shot hardware errors caused by high energy particles from space, manufacturing defects, overheating, and other sources. Such faults can be devastating f...
ACMACE
2006
ACM
14 years 2 months ago
2006
ACM
This paper focuses on the mapping strategies in the interface design for the Expression Synthesis Project (ESP). The goal of ESP is to use the metaphor of driving to allow non-exp...