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» Verifying Progress in Timed Systems
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FDL
2007
IEEE
14 years 2 months ago
Towards Assertion Based Verification of Analog and Mixed Signal Designs Using PSL
Abstract-- Analog and Mixed Signal (AMS) designs are important integrated systems that link digital circuits to the analog world. Following the success of PSL verification methodol...
Ghiath Al Sammane, Mohamed H. Zaki, Zhi Jie Dong, ...
JUCS
2007
110views more  JUCS 2007»
13 years 10 months ago
Self-Evolving Petri Nets
: Nowadays, software evolution is a very hot topic. It is particularly complex when it regards critical and nonstopping systems. Usually, these situations are tackled by hard-codin...
Lorenzo Capra, Walter Cazzola
ICFP
2009
ACM
14 years 10 months ago
Effective interactive proofs for higher-order imperative programs
We present a new approach for constructing and verifying higherorder, imperative programs using the Coq proof assistant. We build on the past work on the Ynot system, which is bas...
Adam J. Chlipala, J. Gregory Malecha, Greg Morrise...
ATAL
2010
Springer
13 years 11 months ago
Using graph analysis to study networks of adaptive agent
Experimental analysis of networks of cooperative learning agents (to verify certain properties such as the system's stability) has been commonly used due to the complexity of...
Sherief Abdallah
MEMOCODE
2007
IEEE
14 years 4 months ago
Towards Equivalence Checking Between TLM and RTL Models
The always increasing complexity of digital system is overcome in design flows based on Transaction Level Modeling (TLM) by designing and verifying the system at difbstraction le...
Nicola Bombieri, Franco Fummi, Graziano Pravadelli...