Sciweavers

932 search results - page 181 / 187
» Verifying Progress in Timed Systems
Sort
View
CSREAESA
2006
13 years 9 months ago
Design and Implementation of SoPC with Multi-Bus on a Chip
SoPC (System on a Programmable Chip) is one important kind of SoC solution based on PLD (Programmable Logic Device). At the same time, PBD (Platform-based Design) has become popul...
Fangjun Jian, Jizhong Han, Chengde Han, Qin Zhang,...
BMCBI
2010
176views more  BMCBI 2010»
13 years 7 months ago
Reverse engineering gene regulatory network from microarray data using linear time-variant model
nd: Gene regulatory network is an abstract mapping of gene regulations in living cells that can help to predict the system behavior of living organisms. Such prediction capability...
Mitra Kabir, Nasimul Noman, Hitoshi Iba
IVC
2007
301views more  IVC 2007»
13 years 7 months ago
Kinematic sets for real-time robust articulated object tracking
In this article a new approach is given for real-time visual tracking of a class of articulated non-rigid objects in 3D. The main contribution of this paper consists in symmetrica...
Andrew I. Comport, Éric Marchand, Fran&cced...
ENVSOFT
2008
80views more  ENVSOFT 2008»
13 years 7 months ago
Modifications to the SWAT code for modelling direct pesticide losses
In different river catchments in Europe, pesticide concentrations in surface waters frequently exceed the standards, possibly resulting in negative impacts on aquatic fauna and fl...
K. Holvoet, A. van Griensven, V. Gevaert, P. Seunt...
SAC
2008
ACM
13 years 7 months ago
Removing useless variables in cost analysis of Java bytecode
Automatic cost analysis has interesting applications in the context of verification and certification of mobile code. For instance, the code receiver can use cost information in o...
Elvira Albert, Puri Arenas, Samir Genaim, Germ&aac...