Sciweavers

1093 search results - page 48 / 219
» Verifying VLSI Circuits
Sort
View
ISCAS
2008
IEEE
136views Hardware» more  ISCAS 2008»
14 years 3 months ago
VLSI architecture for data-reduced steering matrix feedback in MIMO systems
Abstract— Beamforming (BF) for multiple-input multipleoutput (MIMO) wireless communications systems can improve the error rate performance by spatial separation of the transmitte...
Christoph Studer, Peter Luethi, Wolfgang Fichtner
ISCAS
2005
IEEE
113views Hardware» more  ISCAS 2005»
14 years 2 months ago
On the robustness of an analog VLSI implementation of a time encoding machine
Abstract— Time encoding is a mechanism for representing the information contained in a continuous time, bandlimited, analog signal as the zero-crossings of a binary signal. Time ...
Peter R. Kinget, Aurel A. Lazar, Laszlo T. Toth
ISCAS
2003
IEEE
117views Hardware» more  ISCAS 2003»
14 years 2 months ago
Learning temporal correlations in biologically-inspired aVLSI
Temporally-asymmetric Hebbian learning is a class of algorithms motivated by data from recent neurophysiology experiments. While traditional Hebbian learning rules use mean firin...
Adria Bofill-i-Petit, Alan F. Murray
ISCAS
2003
IEEE
88views Hardware» more  ISCAS 2003»
14 years 2 months ago
A small analog VLSI inner hair cell model
In this paper we present a simplified analog VLSI inner hair cell model, which models the main characteristics of the biological inner hair cell, i.e., 1) soft half-wave rectifica...
André van Schaik
ICES
2001
Springer
136views Hardware» more  ICES 2001»
14 years 1 months ago
Initial Studies of a New VLSI Field Programmable Transistor Array
A system for intrinsic hardware evolution of analog electronic circuits is presented. It consists of a VLSI chip featuring 16 × 16 programmable transistor cells, an FPGA based PCI...
Jörg Langeheine, Joachim Becker, Simon Fö...