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EVOW
2008
Springer
13 years 9 months ago
Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures
Abstract. In this paper we propose three small instances of a reconfigurable circuit and analyze their properties using the brute force method and evolutionary algorithm. Although ...
Lukás Sekanina, Petr Mikusek
GECCO
2000
Springer
182views Optimization» more  GECCO 2000»
13 years 11 months ago
A Novel Evolvable Hardware Framework for the Evolution of High Performance Digital Circuits
This paper presents a novel evolvable hardware framework for the automated design of digital circuits for high performance applications. The technique evolves circuits correspondi...
Ben I. Hounsell, Tughrul Arslan
CAI
2004
Springer
13 years 7 months ago
An Evolvable Combinational Unit for FPGAs
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...
Lukás Sekanina, Stepan Friedl
EUROGP
2008
Springer
128views Optimization» more  EUROGP 2008»
13 years 9 months ago
Hardware Accelerators for Cartesian Genetic Programming
A new class of FPGA-based accelerators is presented for Cartesian Genetic Programming (CGP). The accelerators contain a genetic engine which is reused in all applications. Candidat...
Zdenek Vasícek, Lukás Sekanina
EH
2000
IEEE
156views Hardware» more  EH 2000»
13 years 12 months ago
Evolution of Analog Circuits on Field Programmable Transistor Arrays
Evolvable Hardware (EHW) refers to HW design and selfreconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, describing ...
Adrian Stoica, Didier Keymeulen, Ricardo Salem Zeb...