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HIPEAC
2011
Springer
12 years 9 months ago
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
Ahmed Abousamra, Alex K. Jones, Rami G. Melhem
AOSD
2012
ACM
12 years 5 months ago
Reusing non-functional concerns across languages
Emerging languages are often source-to-source compiled to mainstream ones, which offer standardized, fine-tuned implementations of non-functional concerns (NFCs)—including pers...
Myoungkyu Song, Eli Tilevich
ASPLOS
2012
ACM
12 years 5 months ago
Chameleon: operating system support for dynamic processors
The rise of multi-core processors has shifted performance efforts towards parallel programs. However, single-threaded code, whether from legacy programs or ones difficult to para...
Sankaralingam Panneerselvam, Michael M. Swift
CSCW
2012
ACM
12 years 5 months ago
DiscoTech: a plug-in toolkit to improve handling of disconnection and reconnection in real-time groupware
Disconnection and reconnection are common problems for users of synchronous groupware, but these problems are not easy for developers to handle because of the wide range of scenar...
Banani Roy, T. C. Nicholas Graham, Carl Gutwin
CSCW
2012
ACM
12 years 5 months ago
Markup as you talk: establishing effective memory cues while still contributing to a meeting
Meeting participants can experience cognitive overload when they need both to verbally contribute to ongoing discussion while simultaneously creating notes to promote later recall...
Steve Whittaker, Vaiva Kalnikaité, Patrick ...
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