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ISPD
2012
ACM
288views Hardware» more  ISPD 2012»
12 years 5 months ago
Construction of realistic gate sizing benchmarks with known optimal solutions
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
Andrew B. Kahng, Seokhyeong Kang
SI3D
2012
ACM
12 years 5 months ago
Fast, effective BVH updates for animated scenes
Bounding volume hierarchies (BVHs) are a popular acceleration structure choice for animated scenes rendered with ray tracing. This is due to the relative simplicity of refitting ...
Daniel Kopta, Thiago Ize, Josef B. Spjut, Erik Bru...
STACS
2012
Springer
12 years 5 months ago
On Computing Pareto Stable Assignments
Assignment between two parties in a two-sided matching market has been one of the central questions studied in economics, due to its extensive applications, focusing on different...
Ning Chen
VEE
2012
ACM
238views Virtualization» more  VEE 2012»
12 years 5 months ago
Swift: a register-based JIT compiler for embedded JVMs
Code quality and compilation speed are two challenges to JIT compilers, while selective compilation is commonly used to tradeoff these two issues. Meanwhile, with more and more Ja...
Yuan Zhang, Min Yang, Bo Zhou, Zhemin Yang, Weihua...
VEE
2012
ACM
238views Virtualization» more  VEE 2012»
12 years 5 months ago
Replacement attacks against VM-protected applications
Process-level virtualization is increasingly being used to enhance the security of software applications from reverse engineering and unauthorized modification (called software p...
Sudeep Ghosh, Jason Hiser, Jack W. Davidson
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