Memory models define an interface between programs written in some language and their implementation, determining which behaviour the memory (and thus a program) is allowed to hav...
A stress procedure for reliability screening, SHOrt Voltage Elevation (SHOVE) test, is analyzed here. During SHOVE, test vectors are run at higher-than-normal supply voltage for a...
We study the relation between Nominal Logic and the Theory of Contexts, two approaches for specifying and reasoning about datatypes with binders. We consider a natural-deduction s...
Abstract. Techniques such as verification condition generation, preditraction, and expressive type systems reduce software verification to proving formulas in expressive logics. Pr...
Viktor Kuncak, Ruzica Piskac, Philippe Suter, Thom...
Abstract. Model-checking alternating-time properties has recently attracted much interest in the verification of distributed protocols. While checking the validity of a specificati...