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ISCA
1992
IEEE
151views Hardware» more  ISCA 1992»
14 years 1 months ago
An Elementary Processor Architecture with Simultaneous Instruction Issuing from Multiple Threads
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
Hiroaki Hirata, Kozo Kimura, Satoshi Nagamine, Yos...
GLOBECOM
2007
IEEE
14 years 25 days ago
CAC for Multibeam Opportunistic Schemes in Heterogeneous WiMax Systems Under QoS Constraints
Spatial scheduling in a heterogeneous WiMax Downlink channel, based on partial Channel State Information at the Transmitter (CSIT), is carried out through a multibeam opportunistic...
Nizar Zorba, Ana I. Pérez-Neira
GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
14 years 25 days ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...
LCPC
2000
Springer
14 years 16 days ago
Recursion Unrolling for Divide and Conquer Programs
This paper presents recursion unrolling, a technique for improving the performance of recursive computations. Conceptually, recursion unrolling inlines recursive calls to reduce c...
Radu Rugina, Martin C. Rinard
WSC
2004
13 years 10 months ago
Hierarchical Production Planning Using a Hybrid System Dynamic - Discrete Event Simulation Architecture
Hierarchical production planning provides a formal bridge between long-term plans and short-term schedules. A hybrid simulation-based production planning architecture consisting o...
Jayendran Venkateswaran, Young-Jun Son, Albert Jon...