661 search results - page 18 / 133 » What Can We Expect from Program Verification |
DAC
2005
ACM
14 years 9 months ago
2005
ACM
We describe IODINE, a tool to automatically extract likely design properties using dynamic analysis. A practical bottleneck in the formal verification of hardware designs is the n...
CHI
2010
ACM
14 years 3 months ago
2010
ACM
Interpreting compiler errors and exception messages is challenging for novice programmers. Presenting examples of how other programmers have corrected similar errors may help novi...
MSR
2006
ACM
14 years 2 months ago
2006
ACM
Evolutionary annotations are descriptions of how source code evolves over time. Typical source comments, given their static nature, are usually inadequate for describing how a pro...
RE
2001
Springer
14 years 1 months ago
2001
Springer
A logic model checker can be an effective tool for debugging software applications. A stumbling block can be that model checking tools expect the user to supply a formal statement...
CAV
2004
Springer
14 years 10 days ago
2004
Springer
We study the problem of formally verifying shared memory multiprocessor executions against memory consistency models--an important step during post-silicon verification of multipro...