Discrete gate sizing is a critical optimization in VLSI circuit design. Given a set of available gate sizes, discrete gate sizing problem asks to assign a size to each gate such th...
We extend (and somewhat simplify) the algebraic proof technique of Guth and Katz [7], to obtain several sharp bounds on the number of incidences between lines and points in three ...
This paper1 presents novel algorithms and applications for a particular class of mixed-norm regularization based Multiple Kernel Learning (MKL) formulations. The formulations assu...
Jonathan Aflalo, Aharon Ben-Tal, Chiranjib Bhattac...
A multitask learning framework is developed for discriminative classification and regression where multiple large-margin linear classifiers are estimated for different predictio...
A widely agreed upon definition of time series causality inference, established in the seminal 1969 article of Clive Granger (1969), is based on the relative ability of the histor...