564 search results - page 50 / 113 » Wireplanning in logic synthesis |
HYBRID
2003
Springer
14 years 1 months ago
2003
Springer
Abstract. The use of algorithmic verification and synthesis tools for hybrid systems is currently limited to systems exhibiting simple continuous dynamics such as timed automata o...
DATE
1997
IEEE
14 years 22 days ago
1997
IEEE
A target structure for implementing fast edge-triggered control units is presented. In many cases, the proposed controller is faster than a one-hot encoded structure as its correc...
ISMVL
2010
IEEE
14 years 12 days ago
2010
IEEE
—Using EXOR gates in logic synthesis often results in smaller circuit realizations. While in AND/OR synthesis the problem definition is clear, in AND/EXOR synthesis several clas...
TCAD
2008
13 years 8 months ago
2008
State encoding is one of the most difficult problems in the synthesis of asynchronous controllers. This paper presents a method that can solve the problem of large controllers spec...
ITC
1997
IEEE
14 years 21 days ago
1997
IEEE
Tri-state buses and pass transistor logic are used in many complex applications to achieve high performance and small area. Such circuits often contain logic requiring one-hot sig...