118 search results - page 23 / 24 » Word-Level Sequential Memory Abstraction for Model Checking |
DSN
2008
IEEE
14 years 4 months ago
2008
IEEE
This paper introduces SymPLFIED, a program-level framework which allows specification of arbitrary error detectors and the verification of their efficacy against hardware errors. ...
CAV
2000
Springer
14 years 2 months ago
2000
Springer
Abstract. Any formalmethodor tool is almostcertainlymoreoftenapplied in situationswheretheoutcomeis failure(acounterexample)rather than success (a correctness proof). We present a ...
MICRO
2010
IEEE
13 years 8 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
PLDI
2010
ACM
14 years 2 months ago
2010
ACM
Many opportunities for easy, big-win, program optimizations are missed by compilers. This is especially true in highly layered Java applications. Often at the heart of these misse...
FMCAD
2006
Springer
14 years 1 months ago
2006
Springer
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...