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MICRO
1997
IEEE
108views Hardware» more  MICRO 1997»
14 years 20 days ago
Improving the Accuracy and Performance of Memory Communication Through Renaming
As processors continue to exploit more instruction level parallelism, a greater demand is placed on reducing the e ects of memory access latency. In this paper, we introduce a nov...
Gary S. Tyson, Todd M. Austin
CORR
2011
Springer
177views Education» more  CORR 2011»
13 years 3 months ago
Measuring NUMA effects with the STREAM benchmark
Modern high-end machines feature multiple processor packages, each of which contains multiple independent cores and integrated memory controllers connected directly to dedicated ph...
Lars Bergstrom
GI
2007
Springer
14 years 2 months ago
Cryptanalytic Time-Memory Tradeoffs on COPACOBANA
: This paper presents our ongoing work on the analysis and optimization of cryptanalytic time-memory tradeoffs targeting the COPACOBANA architecture [KPP+ 06] as platform for the p...
Tim Güneysu, Andy Rupp, Stefan Spitz
FPL
2000
Springer
143views Hardware» more  FPL 2000»
14 years 2 days ago
Memory Access Schemes for Configurable Processors
Abstract. This work discusses the Memory Architecture for Reconfigurable Computers (MARC), a scalable, device-independent memory interface that supports both irregular (via configu...
Holger Lange, Andreas Koch
ECTEL
2006
Springer
14 years 4 days ago
An Exploratory Study of the Relationship Between Learning Styles and Cognitive Traits
To provide personalization and adaptivity in technology enhanced learning systems, the needs of learners have to be known by the system first. Detecting these needs is a challengin...
Sabine Graf, Taiyu Lin, Lynn Jeffrey, Kinshuk