This paper presents theoretical yet practical methodologies to model, assure and optimize the Reliability of Clockless Wave Pipeline. Clockless wave pipeline is a cutting-edge and...
T. Feng, Nohpill Park, Yong-Bin Kim, Fabrizio Lomb...
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
Data-flow analysis is an integral part of any aggressive optimizing compiler. We propose a framework for improving the precision of data-flow analysis in the presence of complex c...
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
We propose a new technique for quad-dominant remeshing which separates the local regularity requirements from the global alignment requirements by working in two steps. In the fir...